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A digital design engineer's portfolio with a gate-level logic simulator and a Karnaugh map minimiser.
The Prism template publishes free on yourname.sitesfare.app; every other template can be designed free and publishes with Developer at ₹2,388 a year, or Creative & Design at ₹8,388 a year.
FPGA engineers, RTL and ASIC designers, verification engineers, digital hardware and embedded logic engineers
Every word, photo, colour and typeface is editable in the visual editor, and any section can be hidden. Mobile-responsive on every screen.